/
chihiro.c
executable file
·2245 lines (2025 loc) · 90 KB
/
chihiro.c
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/*
Chihiro is an Xbox-based arcade system from SEGA.
Games on this system include....
Year Game Manufacturer / Developer Media Number Key Chip
+-+------+----------------------------------------------------+--------------------------+--------+------------+--------------|
|*| 2002 | The House of the Dead III | Sega / Wow Entertainment | GDROM | GDX-0001 | 317-0348-COM |
| | 2003 | Crazy Taxi High Roller | Sega / Hitmaker | GDROM | GDX-0002 | 317-0353-COM |
| | 2003 | Crazy Taxi High Roller (Rev A) | Sega / Hitmaker | GDROM | GDX-0002A | 317-0353-COM |
|*| 2003 | Crazy Taxi High Roller (Rev B) | Sega / Hitmaker | GDROM | GDX-0002B | 317-0353-COM |
| | 2003 | Virtua Cop 3 | Sega | GDROM | GDX-0003 | 317-0354-COM |
|*| 2003 | Virtua Cop 3 (Rev A) | Sega | GDROM | GDX-0003A | 317-0354-COM |
| | 2003 | Out Run 2 | Sega | GDROM | GDX-0004 | 317-0372-COM |
|*| 2003 | Out Run 2 (Rev A) | Sega | GDROM | GDX-0004A | 317-0372-COM |
| | 2003 | Out Run 2 prototype (Rev P) | Sega | GDROM | GDX-0004P | |
| | 2004 | Sega Golf Club Network Pro Tour | Sega | GDROM | GDX-0005 | |
| | 2004 | Sega Network Taisen Mahjong MJ 2 | Sega | GDROM | GDX-0006 | |
| | 2004 | Sega Network Taisen Mahjong MJ 2 (Rev A) | Sega | GDROM | GDX-0006A | |
| | 2004 | Sega Network Taisen Mahjong MJ 2 (Rev B) | Sega | GDROM | GDX-0006B | |
|*| 2004 | Sega Network Taisen Mahjong MJ 2 (Rev C) | Sega | GDROM | GDX-0006C | |
| | 2004 | Sega Network Taisen Mahjong MJ 2 (Rev D) | Sega | GDROM | GDX-0006D | |
| | 2005 | Sega Network Taisen Mahjong MJ 2 (Rev E) | Sega | GDROM | GDX-0006E | |
|*| 2005 | Sega Network Taisen Mahjong MJ 2 (Rev F) | Sega | GDROM | GDX-0006F | |
|*| 2005 | Sega Network Taisen Mahjong MJ 2 (Rev G) | Sega | GDROM | GDX-0006G | 317-0374-JPN |
|*| 2004 | Ollie King | Sega / Amusement Vision | GDROM | GDX-0007 | 317-0377-COM |
| | 2004 | Wangan Midnight Maximum Tune (Japan) | Namco | GDROM | GDX-0008 | 317-5101-JPN |
| | 2004 | Wangan Midnight Maximum Tune (Japan) (Rev A) | Namco | GDROM | GDX-0008A | 317-5101-JPN |
|*| 2004 | Wangan Midnight Maximum Tune (Japan) (Rev B) | Namco | GDROM | GDX-0008B | 317-5101-JPN |
| | 2004 | Wangan Midnight Maximum Tune (Export) | Namco | GDROM | GDX-0009 | 317-5101-COM |
| | 2004 | Wangan Midnight Maximum Tune (Export) (Rev A) | Namco | GDROM | GDX-0009A | 317-5101-COM |
|*| 2004 | Wangan Midnight Maximum Tune (Export) (Rev B) | Namco | GDROM | GDX-0009B | 317-5101-COM |
| | 2004 | Outrun 2 SP (Japan) | Sega | GDROM | GDX-0011 | |
|*| 2004 | Ghost Squad | Sega | GDROM | GDX-0012 | 317-0398-COM |
|*| 2004 | Ghost Squad (Rev A) | Sega | GDROM | GDX-0012A | 317-0398-COM |
|*| 2005 | Gundam Battle Operating Simulator | Banpresto | GDROM | GDX-0013 | 317-0400-JPN |
| | 2004 | Outrun 2 Special Tours | Sega | GDROM | GDX-0014 | 317-0xxx-COM |
|*| 2004 | Outrun 2 Special Tours (Rev A) | Sega | GDROM | GDX-0014A | 317-0xxx-COM |
|*| 2005 | Wangan Midnight Maximum Tune 2 (Japan) | Namco | GDROM | GDX-0015 | 317-5106-JPN |
|*| 2005 | Wangan Midnight Maximum Tune 2 (Japan) (Rev A) | Namco | GDROM | GDX-0015A | 317-5106-JPN |
|*| 2005 | Wangan Midnight Maximum Tune 2 (Export) | Namco | GDROM | GDX-0016 | 317-5106-COM |
| | 2005 | Sega Network Taisen Mahjong MJ 3 | Sega | GDROM | GDX-0017 | 317-0414-JPN |
| | 2005 | Sega Network Taisen Mahjong MJ 3 (Rev A) | Sega | GDROM | GDX-0017A | 317-0414-JPN |
| | 2005 | Sega Network Taisen Mahjong MJ 3 (Rev B) | Sega | GDROM | GDX-0017B | 317-0414-JPN |
| | 2005 | Sega Network Taisen Mahjong MJ 3 (Rev C) | Sega | GDROM | GDX-0017C | 317-0414-JPN |
|*| 2005 | Sega Network Taisen Mahjong MJ 3 (Rev D) | Sega | GDROM | GDX-0017D | 317-0414-JPN |
| | 2005 | Sega Network Taisen Mahjong MJ 3 (Rev E) | Sega | GDROM | GDX-0017E | 317-0414-JPN |
|*| 2005 | Sega Network Taisen Mahjong MJ 3 (Rev F) | Sega | GDROM | GDX-0017F | 317-0414-JPN |
| | 2005 | Sega Club Golf 2006: Next Tours | Sega | GDROM | GDX-0018 | |
|*| 2005 | Sega Club Golf 2006: Next Tours (Rev A) | Sega | GDROM | GDX-0018A | |
| | 2006 | Sega Network Taisen Mahjong MJ 3 Evolution | Sega | GDROM | GDX-0021 | |
| | 2006 | Sega Network Taisen Mahjong MJ 3 Evolution (Rev A) | Sega | GDROM | GDX-0021A | |
| | 2009 | Firmware Update For Compact Flash Box | Sega | GDROM | GDX-0024 | |
|*| 2009 | Firmware Update For Compact Flash Box (Rev A) | Sega | GDROM | GDX-0024A | 317-0567-EXP |
|*| 2004 | Quest Of D (Ver.1.01C) | Sega | CDROM | CDV-10005C | |
|*| 2005 | Sangokushi Taisen (Ver.1.002) | Sega | DVDROM | CDV-10009D | |
|*| 2006 | Sangokushi Taisen 2 (Ver.2.007) | Sega | DVDROM | CDV-10019A | |
|*| 2005 | Sangokushi Taisen | Sega | DVDROM | CDV-10022 | |
|*| 2006 | Sangokushi Taisen 2 Firmware Update | Sega | DVDROM | CDV-10023 | |
|*| 2006 | Sangokushi Taisen 2 | Sega | DVDROM | CDV-10029 | |
|*| 2008 | Sangokushi Taisen 3 | Sega | DVDROM | CDV-10036 | |
|*| 2008 | Sangokushi Taisen 3 (Ver.J) | Sega | DVDROM | CDV-10036J | |
|*| 2008 | Sangokushi Taisen 3 War Begins (Ver.3.59) | Sega | DVDROM | CDV-10041 | |
|*| 2008 | Sangokushi Taisen 3 War Begins | Sega | DVDROM | CDV-10042 | |
+-+------+----------------------------------------------------+--------------------------+--------+------------+--------------+
* denotes these games are archived.
Year Game (Unknown media) Manufacturer
+-+-----------------------------------------------------------+------------+
| | 2004 | Quest Of D | Sega |
| | 2004 | Quest Of D (Ver.1.02) | Sega |
| | 2004 | Quest Of D (Ver.1.10) | Sega |
| | 2004 | Quest Of D (Ver.1.10a) | Sega |
| | 2005 | Quest Of D (Ver.1.20) | Sega |
| | 2005 | Quest Of D (Ver.1.20a) | Sega |
| | 2005 | Quest Of D (Ver.1.21) | Sega |
| | 2005 | Quest Of D: Gofu no Keisyousya (Ver.2.00) | Sega |
| | 2005 | Quest Of D: Gofu no Keisyousya (Ver.2.01) | Sega |
| | 2006 | Quest Of D: Gofu no Keisyousya (Ver.2.02b) | Sega |
| | 2006 | Quest Of D: Oukoku no Syugosya (Ver.3.00) | Sega |
| | 2006 | Quest Of D: Oukoku no Syugosya (Ver.3.01) | Sega |
| | 2007 | Quest Of D: The Battle Kingdom (Ver.4.00) | Sega |
| | 2008 | Quest Of D: The Battle Kingdom (Ver.4.00b) | Sega |
| | 2008 | Quest Of D: The Battle Kingdom (Ver.4.00c) | Sega |
| | 2008 | Quest Of D: The Battle Kingdom (Ver.4.01) | Sega |
| | 2005 | Sangokushi Taisen (Ver.1.03) | Sega |
| | 2005 | Sangokushi Taisen (Ver.1.10) | Sega |
| | 2005 | Sangokushi Taisen (Ver.1.11) | Sega |
| | 2006 | Sangokushi Taisen (Ver.1.12) | Sega |
| | 2006 | Sangokushi Taisen 2 (Ver.2.01) | Sega |
| | 2005 | Sega Golf Club Network Pro Tour 2005 | Sega |
+-+------+----------------------------------------------------+------------+
A Chihiro system consists of several boards.
The system is in 2 separate metal boxes that fit together to form one box.
In order from top to bottom they are....
- Network board \
- Media board / Together in the top box
- Base board \
- Xbox board / Together in the bottom box
The 2 boxes join together via the Base Board upper connector and Media Board lower connector.
The Microsoft-manufactured XBox board is the lowest board. It's mostly the same as the V1 XBox retail
board with the exception that it has 128MB of RAM and a NVidia MCPX X2 chip. The retail XBox board has a
MCPX X3 chip. The board was probably released to Sega very early in development and the chip was updated
in the mass-produced retail version.
The Sega-manufactured base board is connected to the XBox board via a 40 pin 80-wire flat cable and a 16
pin 16-wire flat cable connects to the LPC header, plus a couple of thin multi-wire cables which join to the
XBox game controller ports (USB1.1) and front panel connector.
On the reverse side of that board are the power output connectors going to the XBox board and a 100 pin
connector where the media board plugs in. A CR2032 coin battery is also located there and next to it are 6
jumpers....
JP3S 2-3 \
JP4S 1-2 |
JP5S 1-2 |
JP6S 2-3 | These are connected to the USB chip on the other side of this board
JP7S 1-2 |
JP8S 2-3 /
A long connector on one edge connects to the filter board (power supply input etc) and on another edge are
connectors for VGA output, audio/video input (from a short cable coming from the A/V connector on the XBox board)
and a 14 pin connector which is unused. The base board handles JVS and video output.
The upper part contains a Sega-manufactured media board with a TSOP48 flash ROM containing an xbox .xbe loader
(this is the Chihiro logo you see when you power the Chihiro) and there's a connector for a Sega network board.
The network board is 100% the same as the one in the Triforce v3 with the same firmware also.
The system requires one of the various Sega JVS I/O boards to operate.
ROMs on the boards
------------------
Network Board : One ST 29W160ET 2M x8-bit TSOP48 Flash ROM stamped 'FPR24036' at location IC2
Media Board : One ST 29W160ET 2M x8-bit TSOP48 Flash ROM stamped 'FPR24042' at location IC8
As in Triforce, it consists of two versions in the same flash, the first MB of the flash has
an older version as backup, and the second MB has the current version, versions included are:
SegaBoot Ver.2.00.0 Build:Feb 7 2003 12:28:30
SegaBoot Ver.2.13.0 Build:Mar 3 2005 17:03:15
Base Board : Two Microchip 24LC64 64k Serial EEPROMs at locations IC32 and IC10
One Microchip 24LC24 2k Serial EEPROM at location IC11
The chip at IC32 seems to be a backup of the base board firmware without region or serial.
The chip at IC11 has an unknown purpose. It contains some strings. The interesting thing is that it
contains the string SBJE. If you go to the system info menu and press the service button 16 times in a row
a message will be displayed: GAME ID SBJE
The chip at IC10 contains the firmware of the Base Board, serial number and REGION of the whole system.
The region is located at offset 0x00001F10. 01 is JAPAN, 02 is USA, 03 is EXPORT. If you want to change
the region of your Chihiro unit just change this byte.
Alternatively, if you have a netboot PIC, plug that in and power up with it.
1) Enter the test menu (push the test button)
2) Go to the System Information menu.
3) Press the Service button 30 times in a row and a hidden menu will appear to change the region.
4) Once the region is changed, exit from the menus and after the Chihiro reboots, power off the system and
power on again.
Xbox Board : One Macronix 29F040TC-90 512k x8-bit TSOP32 Flash ROM at location U7D1
Board Layouts
=============
XBox Board
----------
|--------------------------------------------|
| LAN FAN1 A/V FAN2|
| |
| LF353 CONEXANT |
|DVD_PWR WM9709 XC25871-14 |
| |
| ICS_UA431317 |-------------------|
| LM358 |
| 27MHz PIC16LC63A |
|IDE BR24C02 |
| ICS_455R-02 |
| K4D263238D |
| 29F040.U7D1 *K4D263238D |
| |
| GPU CPU @733MHz |
| 16_PIN_CONN (WITH FAN) (SL5SN 733/128)|
| K4D263238D |
| *K4D263238D |
| |
| |
| K4D263238D K4D263238D |
| *K4D263238D *K4D263238D |
| NVIDIA |
| MCPX X2 |
| POWER_CONN |
| |
| |
| |
| GAME1/2 FRONT_PANEL GAME3/4 |
|----------------------------------------------------------------|
Notes:
* These parts located on the other side of the PCB
Some of the connectors are not used.
Base Board
----------
171-8204B
837-14280 SEGA 2002
Sticker: 837-14280-92
|----------------------------------------------------------------|
|*CN16S *CN14S *CN19S ADM3222 |
| CN8|
| 24LC64.IC32 |
|CN11 CN18 CN1 PC410 |
| LM1881 |
| SN65240 |
| SN65240 AN2131SC BA7623 |
| CN10|
| 12MHz BA7623 |
| *CR2032 |
| SUPERCAP |
| 32.768kHz |
|CN12 RV5C386A |
| 24LC024.IC11 M68AF127 CN9|
| 24LC64.IC10 AN2131QC |
| ADM3222 DS485 |
| 1.85MHz |
| 3771 CN5|
|-------------------------| CN15 |-----------------|
|--------------------|
Notes:
(* these parts on other side of the PCB)
RV5C386A - I2C Bus Serial Interface Real-Time Clock IC with Voltage Monitoring Function (SSOP10)
24LC64 - Microchip 24LC64 64K I2C Serial EEPROM (SOIC8)
24LC024 - Microchip 24LC024 2K I2C Serial EEPROM (SOIC8)
M68AF127B - ST Microelectronics 1Mbit (128K x8), 5V Asynchronous SRAM (SOP32)
AN2131QC - Cypress AN2131 EZ-USB-Family 8051-based High-Speed USB IC's (QFP80)
AN2131SC / (QFP44)
ADM3222 - Analog Devices ADM3222 High-Speed, +3.3V, 2-Channel RS232/V.28 Interface Device (SOIC20)
SN65240 - Texas Instruments SN65240 USB Port Transient Suppressor (SOIC8)
BA7623 - Rohm BA7623 75-Ohm driver IC with 3 internal circuits (SOIC8)
LM1881 - National LM1881 Video Sync Separator (SOIC8)
DS485 - National DS485 Low-Power RS-485/RS-422 Multipoint Transceiver (SOIC8)
3771 - Fujitsu MB3771 System Reset IC (SOIC8)
PC410 - Sharp PC410 Ultra-high Speed Response OPIC Photocoupler
CN1 - 22-pin multi-wire cable connector joining to XBox board
CN5 - USB connector joining to JVS I/O board with standard USB cable
CN8 - A/V input connector (from XBox board via short A/V cable)
CN9 - VGA output connector
CN10 - 14 pin connector (purpose unknown but appears to be unused)
CN11 - 16-pin flat cable connector joining to LPC connector on XBox board
CN12 - 40-pin IDE flat cable connector joining to IDE connector on XBox board
CN14S - 7-pin power output connector joining to XBox board
CN15 - 96-pin connector joining to filter board
CN16S - 2-pin connector joining to case fan on Chihiro lower section (next to XBox PCB)
CN18 - 10-pin multi-wire cable connector joining to XBox board
CN19S - 5-pin power output connector joining to XBox board
There are also many power-related components such as capacitors, mosfets and transistors.
Network Board
-------------
This board is identical to the network board used in Triforce games.
See src/mame/drivers/triforce.c
Media Board
-----------
171-8234C
837-14359-01 SEGA 2002
Sticker: 837-14359-91
|----------------------------------------------------------------|
| LED LED |
| FLASH.IC8 |
| LED CN12 CN11 |
| LED JP4-JP10 CN10|
| |
| |
| |----------| |
| |SEGA | |
| CN14S* |315-6355 | |
| | | |
| | | |
| MB3800* |----------| CN8|
| CY25560* |
| |
| CY23S09SC 49.25MHz |
| |
| CN4 (DIMM) |
| CN3 (DIMM) CN5|
| MM1433* |
| CN13 TPC8009 CN9 CN6 |
|----------------------------------------------------------------|
Notes:
* - These parts on other side of PCB
CN3/4 - 72 pin DIMM sockets
CN5 - GDROM data cable connector (SCSI mini-honda connection but signal/protocol is IDE)
CN6 - 40 pin flat cable connector (unused)
CN8 - 6 pin GDROM power connector
CN9 - 6 pin power connector (unused)
CN10 - Connector for small 90-degrees upright board where PIC plugs in. The upright board contains only a DIP18 socket and a 4MHz OSC.
CN11/12 - Network board connectors joining to Sega Network PCB
CN13 - Battery connector (maintains power to DIMM RAM)
CN14S - 100 pin connector joining to base board
JP4-10 - Jumpers. Settings are as follows (taken from Wangan Midnight Maximum Tune 2 (Japan) (Rev A))
JP4 2-3
JP5 2-3. Sets DIMM RAM size. 1-2 = 1GB (2x 512M sticks), 2-3 = 512MB (1x 512M stick)
JP6 1-2
JP7 2-3
JP8 2-3
JP9 1-2
JP10 1-2
FLASH.IC8 - ST M29W160 16MBit Flash ROM stamped 'FPR24042' (TSOP48)
Filter Board
------------
839-1208-02
171-8205C SEGA 2002
|----------------------------------------------------------------|
| SP-DIF LED_STATUS2 LED_STATUS1 CN3 |
| |
| DIN1 LED_3.3V |
| LED_5V |
| DIPSW(8) LED_12V |
|CN6 CN5 CN4 SW2 SW1 CN2 CN1 |
|----------------------------------------------------------------|
Notes:
CN1 - 8-pin JVS power input connector
CN2 - 6-pin JVS power input connector
CN3 - Red/white RCA unamplified stereo audio output jacks
CN4 - 11-pin connector
CN5 - 8-pin connector
CN6 - 7-pin connector
SW1/2 - test/service buttons
DIN1 - 96-pin connector joining to Base Board
DIPSW - 8-position DIP switch. On this game (Wangan Midnight Maximum Tune 2 (Japan) (Rev A)) DIPs 3, 4, 6, 7 & 8 are set ON. The others are OFF.
Dump info:
Network Board Dump : Ver1305.bin
Media Board dump : FPR21042_M29W160ET.bin
Base Board Dumps : ic10_g24lc64.bin ic11_24lc024.bin pc20_g24lc64.bin
Xbox Board Dump : chihiro_xbox_bios.bin
FPR21042_M29W160ET.bin :
As in Triforce, it consists of two versions in the same flash, the first MB of the flash has
an older version as backup, and the second MB has the current version, versions included are:
SegaBoot Ver.2.00.0 Build:Feb 7 2003 12:28:30
SegaBoot Ver.2.13.0 Build:Mar 3 2005 17:03:15
ic10_g24lc64.bin: This dump contains the firmware of the Base Board, serial number and REGION of the whole system
Region is located at Offset 0x00001F10 , 01 means JAP, 02 Means USA, 03 Means EXPORT, if you
want to change the region of your Chihiro Board, just change this byte.
Thanks to Alex, Mr Mudkips, and Philip Burke for this info.
*/
#include "emu.h"
#include "cpu/i386/i386.h"
#include "machine/lpci.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
#include "machine/idectrl.h"
#include "machine/idehd.h"
#include "machine/naomigd.h"
#include "video/poly.h"
#include "bitmap.h"
#include "debug/debugcon.h"
#include "debug/debugcmd.h"
#include "debug/debugcpu.h"
#include "includes/chihiro.h"
#define LOG_PCI
//#define LOG_OHCI
//#define LOG_BASEBOARD
class chihiro_state : public driver_device
{
public:
chihiro_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
nvidia_nv2a(NULL),
debug_irq_active(false),
m_maincpu(*this, "maincpu") { }
DECLARE_READ32_MEMBER(geforce_r);
DECLARE_WRITE32_MEMBER(geforce_w);
DECLARE_READ32_MEMBER(usbctrl_r);
DECLARE_WRITE32_MEMBER(usbctrl_w);
DECLARE_READ32_MEMBER(smbus_r);
DECLARE_WRITE32_MEMBER(smbus_w);
DECLARE_READ32_MEMBER(mediaboard_r);
DECLARE_WRITE32_MEMBER(mediaboard_w);
DECLARE_READ32_MEMBER(audio_apu_r);
DECLARE_WRITE32_MEMBER(audio_apu_w);
DECLARE_READ32_MEMBER(audio_ac93_r);
DECLARE_WRITE32_MEMBER(audio_ac93_w);
DECLARE_READ32_MEMBER(dummy_r);
DECLARE_WRITE32_MEMBER(dummy_w);
void smbus_register_device(int address, int(*handler)(chihiro_state &chs, int command, int rw, int data));
int smbus_pic16lc(int command, int rw, int data);
int smbus_cx25871(int command, int rw, int data);
int smbus_eeprom(int command, int rw, int data);
void baseboard_ide_event(int type, UINT8 *read, UINT8 *write);
UINT8 *baseboard_ide_dimmboard(UINT32 lba);
void dword_write_le(UINT8 *addr, UINT32 d);
void word_write_le(UINT8 *addr, UINT16 d);
void debug_generate_irq(int irq, bool active);
void vblank_callback(screen_device &screen, bool state);
UINT32 screen_update_callback(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
virtual void machine_start();
DECLARE_WRITE_LINE_MEMBER(chihiro_pic8259_1_set_int_line);
DECLARE_READ8_MEMBER(get_slave_ack);
DECLARE_WRITE_LINE_MEMBER(chihiro_pit8254_out0_changed);
DECLARE_WRITE_LINE_MEMBER(chihiro_pit8254_out2_changed);
IRQ_CALLBACK_MEMBER(irq_callback);
TIMER_CALLBACK_MEMBER(audio_apu_timer);
struct chihiro_devices {
pic8259_device *pic8259_1;
pic8259_device *pic8259_2;
bus_master_ide_controller_device *ide;
naomi_gdrom_board *dimmboard;
} chihiro_devs;
struct smbus_state {
int status;
int control;
int address;
int data;
int command;
int rw;
int(*devices[128])(chihiro_state &chs, int command, int rw, int data);
UINT32 words[256 / 4];
} smbusst;
struct apu_state {
UINT32 memory[0x60000 / 4];
UINT32 gpdsp_sgaddress; // global processor scatter-gather
UINT32 gpdsp_sgblocks;
UINT32 gpdsp_address;
UINT32 epdsp_sgaddress; // encoder processor scatter-gather
UINT32 epdsp_sgblocks;
UINT32 unknown_sgaddress;
UINT32 unknown_sgblocks;
int voice_number;
UINT32 voices_heap_blockaddr[1024];
UINT64 voices_active[4]; //one bit for each voice: 1 playing 0 not
UINT32 voicedata_address;
int voices_frequency[256]; // sample rate
int voices_position[256]; // position in samples * 1000
int voices_position_start[256]; // position in samples * 1000
int voices_position_end[256]; // position in samples * 1000
int voices_position_increment[256]; // position increment every 1ms * 1000
emu_timer *timer;
address_space *space;
} apust;
struct ac97_state {
UINT32 mixer_regs[0x80 / 4];
UINT32 controller_regs[0x38 / 4];
} ac97st;
UINT8 pic16lc_buffer[0xff];
nv2a_renderer *nvidia_nv2a;
bool debug_irq_active;
int debug_irq_number;
UINT8 *dimm_board_memory;
UINT32 dimm_board_memory_size;
int usbhack_counter;
required_device<cpu_device> m_maincpu;
};
/* jamtable instructions for Chihiro (different from console)
St. Instr. Comment
0x01 POKEPCI PCICONF[OP2] := OP1
0x02 OUTB PORT[OP2] := OP1
0x03 POKE MEM[OP2] := OP1
0x04 BNE IF ACC <> OP2 THEN PC := PC + OP1
0x05 PEEKPCI ACC := PCICONF[OP2]
0x06 AND/OR ACC := (ACC & OP2) | OP1
0x07 BRA PC := PC + OP1
0x08 INB ACC := PORT[OP2]
0x09 PEEK ACC := MEM[OP2]
0xE1 (prefix) execute the instruction code in OP2 with OP2 := OP1, OP1 := ACC
0xEE END
*/
/* jamtable disassembler */
static void jamtable_disasm(running_machine &machine, address_space &space, UINT32 address, UINT32 size) // 0xff000080 == fff00080
{
offs_t base, addr;
UINT32 opcode, op1, op2;
char sop1[16];
char sop2[16];
char pcrel[16];
addr = (offs_t)address;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &addr))
{
debug_console_printf(machine, "Address is unmapped.\n");
return;
}
while (1)
{
base = addr;
opcode = space.read_byte(addr);
addr++;
op1 = space.read_dword_unaligned(addr);
addr += 4;
op2 = space.read_dword_unaligned(addr);
addr += 4;
if (opcode == 0xe1)
{
opcode = op2 & 255;
op2 = op1;
//op1=edi;
sprintf(sop2, "%08X", op2);
sprintf(sop1, "ACC");
sprintf(pcrel, "PC+ACC");
}
else
{
sprintf(sop2, "%08X", op2);
sprintf(sop1, "%08X", op1);
sprintf(pcrel, "%08X", base + 9 + op1);
}
debug_console_printf(machine, "%08X ", base);
// dl=instr ebx=par1 eax=par2
switch (opcode)
{
case 0x01:
// if ((op2 & 0xff) == 0x880) op1=op1 & 0xfffffffd
// out cf8,op2
// out cfc,op1
// out cf8,0
// cf8 (CONFIG_ADDRESS) format:
// 31 30 24 23 16 15 11 10 8 7 2 1 0
// +-+----------+------------+---------------+-----------------+-----------------+-+-+
// | | Reserved | Bus Number | Device Number | Function Number | Register Number |0|0|
// +-+----------+------------+---------------+-----------------+-----------------+-+-+
// 31 - Enable bit
debug_console_printf(machine, "POKEPCI PCICONF[%s]=%s\n", sop2, sop1);
break;
case 0x02:
debug_console_printf(machine, "OUTB PORT[%s]=%s\n", sop2, sop1);
break;
case 0x03:
debug_console_printf(machine, "POKE MEM[%s]=%s\n", sop2, sop1);
break;
case 0x04:
debug_console_printf(machine, "BNE IF ACC != %s THEN PC=%s\n", sop2, pcrel);
break;
case 0x05:
// out cf8,op2
// in acc,cfc
debug_console_printf(machine, "PEEKPCI ACC=PCICONF[%s]\n", sop2);
break;
case 0x06:
debug_console_printf(machine, "AND/OR ACC=(ACC & %s) | %s\n", sop2, sop1);
break;
case 0x07:
debug_console_printf(machine, "BRA PC=%s\n", pcrel);
break;
case 0x08:
debug_console_printf(machine, "INB ACC=PORT[%s]\n", sop2);
break;
case 0x09:
debug_console_printf(machine, "PEEK ACC=MEM[%s]\n", sop2);
break;
case 0xee:
debug_console_printf(machine, "END\n");
break;
default:
debug_console_printf(machine, "NOP ????\n");
break;
}
if (opcode == 0xee)
break;
if (size <= 9)
break;
size -= 9;
}
}
static void jamtable_disasm_command(running_machine &machine, int ref, int params, const char **param)
{
chihiro_state *state = machine.driver_data<chihiro_state>();
address_space &space = state->m_maincpu->space();
UINT64 addr, size;
if (params < 2)
return;
if (!debug_command_parameter_number(machine, param[0], &addr))
return;
if (!debug_command_parameter_number(machine, param[1], &size))
return;
jamtable_disasm(machine, space, (UINT32)addr, (UINT32)size);
}
static void dump_string_command(running_machine &machine, int ref, int params, const char **param)
{
chihiro_state *state = machine.driver_data<chihiro_state>();
address_space &space = state->m_maincpu->space();
UINT64 addr;
offs_t address;
UINT32 length, maximumlength;
offs_t buffer;
if (params < 1)
return;
if (!debug_command_parameter_number(machine, param[0], &addr))
return;
address = (offs_t)addr;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
{
debug_console_printf(machine, "Address is unmapped.\n");
return;
}
length = space.read_word_unaligned(address);
maximumlength = space.read_word_unaligned(address + 2);
buffer = space.read_dword_unaligned(address + 4);
debug_console_printf(machine, "Length %d word\n", length);
debug_console_printf(machine, "MaximumLength %d word\n", maximumlength);
debug_console_printf(machine, "Buffer %08X byte* ", buffer);
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &buffer))
{
debug_console_printf(machine, "\nBuffer is unmapped.\n");
return;
}
if (length > 256)
length = 256;
for (int a = 0; a < length; a++)
{
UINT8 c = space.read_byte(buffer + a);
debug_console_printf(machine, "%c", c);
}
debug_console_printf(machine, "\n");
}
static void dump_process_command(running_machine &machine, int ref, int params, const char **param)
{
chihiro_state *state = machine.driver_data<chihiro_state>();
address_space &space = state->m_maincpu->space();
UINT64 addr;
offs_t address;
if (params < 1)
return;
if (!debug_command_parameter_number(machine, param[0], &addr))
return;
address = (offs_t)addr;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
{
debug_console_printf(machine, "Address is unmapped.\n");
return;
}
debug_console_printf(machine, "ReadyListHead {%08X,%08X} _LIST_ENTRY\n", space.read_dword_unaligned(address), space.read_dword_unaligned(address + 4));
debug_console_printf(machine, "ThreadListHead {%08X,%08X} _LIST_ENTRY\n", space.read_dword_unaligned(address + 8), space.read_dword_unaligned(address + 12));
debug_console_printf(machine, "StackCount %d dword\n", space.read_dword_unaligned(address + 16));
debug_console_printf(machine, "ThreadQuantum %d dword\n", space.read_dword_unaligned(address + 20));
debug_console_printf(machine, "BasePriority %d byte\n", space.read_byte(address + 24));
debug_console_printf(machine, "DisableBoost %d byte\n", space.read_byte(address + 25));
debug_console_printf(machine, "DisableQuantum %d byte\n", space.read_byte(address + 26));
debug_console_printf(machine, "_padding %d byte\n", space.read_byte(address + 27));
}
static void dump_list_command(running_machine &machine, int ref, int params, const char **param)
{
chihiro_state *state = machine.driver_data<chihiro_state>();
address_space &space = state->m_maincpu->space();
UINT64 addr, offs, start, old;
offs_t address, offset;
if (params < 1)
return;
if (!debug_command_parameter_number(machine, param[0], &addr))
return;
offs = 0;
offset = 0;
if (params >= 2)
{
if (!debug_command_parameter_number(machine, param[1], &offs))
return;
offset = (offs_t)offs;
}
start = addr;
address = (offs_t)addr;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
{
debug_console_printf(machine, "Address is unmapped.\n");
return;
}
if (params >= 2)
debug_console_printf(machine, "Entry Object\n");
else
debug_console_printf(machine, "Entry\n");
for (int num = 0; num < 32; num++)
{
if (params >= 2)
debug_console_printf(machine, "%08X %08X\n", (UINT32)addr, (offs_t)addr - offset);
else
debug_console_printf(machine, "%08X\n", (UINT32)addr);
old = addr;
addr = space.read_dword_unaligned(address);
if (addr == start)
break;
if (addr == old)
break;
address = (offs_t)addr;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
break;
}
}
static void curthread_command(running_machine &machine, int ref, int params, const char **param)
{
chihiro_state *state = machine.driver_data<chihiro_state>();
address_space &space = state->m_maincpu->space();
UINT64 fsbase;
UINT32 kthrd, topstack, tlsdata;
offs_t address;
fsbase = state->m_maincpu->state_int(44);
address = (offs_t)fsbase + 0x28;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
{
debug_console_printf(machine, "Address is unmapped.\n");
return;
}
kthrd = space.read_dword_unaligned(address);
debug_console_printf(machine, "Current thread is %08X\n", kthrd);
address = (offs_t)kthrd + 0x1c;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
return;
topstack = space.read_dword_unaligned(address);
debug_console_printf(machine, "Current thread stack top is %08X\n", topstack);
address = (offs_t)kthrd + 0x28;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
return;
tlsdata = space.read_dword_unaligned(address);
if (tlsdata == 0)
address = (offs_t)topstack - 0x210 - 8;
else
address = (offs_t)tlsdata - 8;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
return;
debug_console_printf(machine, "Current thread function is %08X\n", space.read_dword_unaligned(address));
}
static void generate_irq_command(running_machine &machine, int ref, int params, const char **param)
{
UINT64 irq;
chihiro_state *chst = machine.driver_data<chihiro_state>();
if (params < 1)
return;
if (!debug_command_parameter_number(machine, param[0], &irq))
return;
if (irq > 15)
return;
if (irq == 2)
return;
chst->debug_generate_irq((int)irq, true);
}
static void nv2a_combiners_command(running_machine &machine, int ref, int params, const char **param)
{
int en;
chihiro_state *chst = machine.driver_data<chihiro_state>();
en = chst->nvidia_nv2a->toggle_register_combiners_usage();
if (en != 0)
debug_console_printf(machine, "Register combiners enabled\n");
else
debug_console_printf(machine, "Register combiners disabled\n");
}
static void waitvblank_command(running_machine &machine, int ref, int params, const char **param)
{
int en;
chihiro_state *chst = machine.driver_data<chihiro_state>();
en = chst->nvidia_nv2a->toggle_wait_vblank_support();
if (en != 0)
debug_console_printf(machine, "Vblank method enabled\n");
else
debug_console_printf(machine, "Vblank method disabled\n");
}
static void grab_texture_command(running_machine &machine, int ref, int params, const char **param)
{
UINT64 type;
chihiro_state *chst = machine.driver_data<chihiro_state>();
if (params < 2)
return;
if (!debug_command_parameter_number(machine, param[0], &type))
return;
if ((param[1][0] == 0) || (strlen(param[1]) > 127))
return;
chst->nvidia_nv2a->debug_grab_texture((int)type, param[1]);
}
static void grab_vprog_command(running_machine &machine, int ref, int params, const char **param)
{
chihiro_state *chst = machine.driver_data<chihiro_state>();
UINT32 instruction[4];
FILE *fil;
if (params < 1)
return;
if ((param[0][0] == 0) || (strlen(param[0]) > 127))
return;
if ((fil = fopen(param[0], "wb")) == NULL)
return;
for (int n = 0; n < 136; n++) {
chst->nvidia_nv2a->debug_grab_vertex_program_slot(n, instruction);
fwrite(instruction, sizeof(UINT32), 4, fil);
}
fclose(fil);
}
static void vprogdis_command(running_machine &machine, int ref, int params, const char **param)
{
UINT64 address, length, type;
UINT32 instruction[4];
offs_t addr;
vertex_program_disassembler vd;
char line[64];
chihiro_state *chst = machine.driver_data<chihiro_state>();
address_space &space = chst->m_maincpu->space();
if (params < 2)
return;
if (!debug_command_parameter_number(machine, param[0], &address))
return;
if (!debug_command_parameter_number(machine, param[1], &length))
return;
type = 0;
if (params > 2)
if (!debug_command_parameter_number(machine, param[2], &type))
return;
while (length > 0) {
if (type == 1) {
addr = (offs_t)address;
if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &addr))
return;
instruction[0] = space.read_dword_unaligned(address);
instruction[1] = space.read_dword_unaligned(address + 4);
instruction[2] = space.read_dword_unaligned(address + 8);
instruction[3] = space.read_dword_unaligned(address + 12);
}
else
chst->nvidia_nv2a->debug_grab_vertex_program_slot((int)address, instruction);
while (vd.disassemble(instruction, line) != 0)
debug_console_printf(machine, "%s\n", line);
if (type == 1)
address = address + 4 * 4;
else
address++;
length--;
}
}
static void help_command(running_machine &machine, int ref, int params, const char **param)
{
debug_console_printf(machine, "Available Chihiro commands:\n");
debug_console_printf(machine, " chihiro jamdis,<start>,<size> -- Disassemble <size> bytes of JamTable instructions starting at <start>\n");
debug_console_printf(machine, " chihiro dump_string,<address> -- Dump _STRING object at <address>\n");
debug_console_printf(machine, " chihiro dump_process,<address> -- Dump _PROCESS object at <address>\n");
debug_console_printf(machine, " chihiro dump_list,<address>[,<offset>] -- Dump _LIST_ENTRY chain starting at <address>\n");
debug_console_printf(machine, " chihiro curthread -- Print information about current thread\n");
debug_console_printf(machine, " chihiro irq,<number> -- Generate interrupt with irq number 0-15\n");
debug_console_printf(machine, " chihiro nv2a_combiners -- Toggle use of register combiners\n");
debug_console_printf(machine, " chihiro waitvblank -- Toggle support for wait vblank method\n");
debug_console_printf(machine, " chihiro grab_texture,<type>,<filename> -- Save to <filename> the next used texture of type <type>\n");
debug_console_printf(machine, " chihiro grab_vprog,<filename> -- save current vertex program instruction slots to <filename>\n");
debug_console_printf(machine, " chihiro vprogdis,<address>,<length>[,<type>] -- disassemble <lenght> vertex program instructions at <address> of <type>\n");
debug_console_printf(machine, " chihiro help -- this list\n");
}
static void chihiro_debug_commands(running_machine &machine, int ref, int params, const char **param)
{
if (params < 1)
return;
if (strcmp("jamdis", param[0]) == 0)
jamtable_disasm_command(machine, ref, params - 1, param + 1);
else if (strcmp("dump_string", param[0]) == 0)
dump_string_command(machine, ref, params - 1, param + 1);
else if (strcmp("dump_process", param[0]) == 0)
dump_process_command(machine, ref, params - 1, param + 1);
else if (strcmp("dump_list", param[0]) == 0)
dump_list_command(machine, ref, params - 1, param + 1);
else if (strcmp("curthread", param[0]) == 0)
curthread_command(machine, ref, params - 1, param + 1);
else if (strcmp("irq", param[0]) == 0)
generate_irq_command(machine, ref, params - 1, param + 1);
else if (strcmp("nv2a_combiners", param[0]) == 0)
nv2a_combiners_command(machine, ref, params - 1, param + 1);
else if (strcmp("waitvblank", param[0]) == 0)
waitvblank_command(machine, ref, params - 1, param + 1);
else if (strcmp("grab_texture", param[0]) == 0)
grab_texture_command(machine, ref, params - 1, param + 1);
else if (strcmp("grab_vprog", param[0]) == 0)
grab_vprog_command(machine, ref, params - 1, param + 1);
else if (strcmp("vprogdis", param[0]) == 0)
vprogdis_command(machine, ref, params - 1, param + 1);
else
help_command(machine, ref, params - 1, param + 1);
}
void chihiro_state::debug_generate_irq(int irq, bool active)
{
int state;
if (active)
{
debug_irq_active = true;
debug_irq_number = irq;
state = 1;
}
else
{
debug_irq_active = false;
state = 0;
}
switch (irq)
{
case 0:
chihiro_devs.pic8259_1->ir0_w(state);
break;
case 1:
chihiro_devs.pic8259_1->ir1_w(state);
break;
case 3:
chihiro_devs.pic8259_1->ir3_w(state);
break;
case 4:
chihiro_devs.pic8259_1->ir4_w(state);
break;
case 5:
chihiro_devs.pic8259_1->ir5_w(state);
break;
case 6:
chihiro_devs.pic8259_1->ir6_w(state);
break;
case 7:
chihiro_devs.pic8259_1->ir7_w(state);
break;
case 8:
chihiro_devs.pic8259_2->ir0_w(state);
break;
case 9:
chihiro_devs.pic8259_2->ir1_w(state);
break;
case 10:
chihiro_devs.pic8259_2->ir2_w(state);
break;
case 11:
chihiro_devs.pic8259_2->ir3_w(state);
break;
case 12:
chihiro_devs.pic8259_2->ir4_w(state);
break;
case 13:
chihiro_devs.pic8259_2->ir5_w(state);
break;
case 14:
chihiro_devs.pic8259_2->ir6_w(state);
break;
case 15:
chihiro_devs.pic8259_2->ir7_w(state);
break;
}
}
void chihiro_state::vblank_callback(screen_device &screen, bool state)
{
if (nvidia_nv2a->vblank_callback(screen, state))
chihiro_devs.pic8259_1->ir3_w(1); // IRQ 3
else
chihiro_devs.pic8259_1->ir3_w(0); // IRQ 3
}
UINT32 chihiro_state::screen_update_callback(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
return nvidia_nv2a->screen_update_callback(screen, bitmap, cliprect);
}
READ32_MEMBER(chihiro_state::geforce_r)
{
return nvidia_nv2a->geforce_r(space, offset, mem_mask);
}
WRITE32_MEMBER(chihiro_state::geforce_w)
{
nvidia_nv2a->geforce_w(space, offset, data, mem_mask);
}